Image sensors comprise an array of unit elements, called pixels. The array of pixels is exposed to radiation during an exposure period and, subsequently, the signal value of each pixel is read from the array.
Various arrangements have been proposed where analog-to-digital conversion is performed, in parallel, for analog signal values read from columns of the array.
FIG. 1 shows an analog-to-digital conversion apparatus 10 comprising a ramp generator 20 and a plurality of analog-to-digital converters 30. Only two analog-to-digital converters 30 are shown in FIG. 1 but, in practice, the number of analog-to-digital converters 30 can be much higher. For example, a pixel array may have several thousand columns. The ramp generator 20 is arranged to generate a ramp signal Vramp which is distributed to the converters 30. Each analog-to-digital converter 30 has a comparator which is arranged to compare the ramp signal Vramp with an analog signal level ADC_IN[0], ADC_IN[1]. Each comparator has a respective output COMP_OUT[0], COMP_OUT[1]. Each analog-to-digital converter 30 also comprises a counter (not shown) which is enabled for a period of time based on the comparator output COMP_OUT[0], COMP_OUT[1]. For example, the time period between the falling edge of RESET and the rising edge of COMP_OUT can be a measure of the signal level ADC_IN. This time period can be translated to a digital number by the digital counter which is active during this period.
FIG. 2 shows what happens when two different analog voltage levels are converted by analog-to-digital converters 30 which share the same ramp signal Vramp. When the ramp signal Vramp approaches the value of the analog signal level ADC_IN[0], COMP_OUT[0] toggles and an offset appears on the ramp signal Vramp. Then, when the ramp signal Vramp approaches the value of the analog signal level ADC_IN[1], COMP_OUT[1] toggles and an additional offset is added to the ramp signal Vramp. The analog-to-digital conversion of signal ADC_IN[1] is influenced by the A/D conversion of signal ADC_IN[0]. The dashed line in FIG. 2 shows the correct value of Vramp. It can be seen that the time period Tcount[1] is longer than it should be, due to the influence that the first comparator had on the ramp signal Vramp.
The present invention seeks to provide an analog-to-digital conversion apparatus with improved accuracy.